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2024年3月12日发(作者：quickq电脑版官网下载)

专利内容由知识产权出版社提供

专利名称：CACHE WITH COMPRESSED DATA AND TAG

发明人：SAIDI, Ali,SUDAN, Kshitij,RUSHING, Andrew

Joseph,HANSSON, Andreas,FILIPPO, Michael

申请号：GB2017/051559

申请日：20170531

公开号：WO2018/002576A1

公开日：20180104

专利附图：

摘要：Cache line data and metadata are compressed and stored in first and,

optionally, second memory regions, the metadata including an address tag When the

compressed data fit entirely within a primary block in the first memory region, both data

and metadata are retrieved in a single memory access. Otherwise, overflow data is stored

in an overflow block in the second memory region. The first and second memory regions

may be located in the same row of a DRAM, for example, or in different regions of a

DRAM and may be configured to enable standard DRAM components to be used.

Compression and decompression logic circuits may be included in a memory controller.

申请人：ARM LTD

地址：CB1 9NJ GB

国籍：GB

代理人：TLIP LTD

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